Mapping the Semiconductors and Microelectronics Standards Landscape: ASCET Releases Environmental Scan

Semiconductors underpin nearly every aspect of modern life, and standards will be decisive in enabling the innovation, interoperability, security, and long-term resilience industry depends on.

The Advancing Standardization for Critical and Emerging Technologies (ASCET) Center of Excellence (CoE) has released an environmental scan mapping the current semiconductors and microelectronics standardization landscape and identifying the pre-standardization gaps most consequential to sustained U.S. leadership in the field.

Access the report.

Spanning advanced packaging, supply chain security, sustainability, and workforce readiness, the scan assesses semiconductor standardization at all levels by:

• Mapping the standardization landscape across the semiconductor value chain, from advanced packaging to environmental metrics
• Identifying key stakeholders, existing standards activity, current roadmaps, and the relevant standards bodies
• Assessing gaps spanning supply chain security and traceability, interoperable design rules, and workforce readiness
• Highlighting opportunities including AI-enabled semiconductor innovation, chiplet integration, and sustainability metrics

As semiconductors remain foundational to economic growth, national security, and global competitiveness, well-timed and strategically prioritized standardization will be essential to translating advances into impact. This is the fourth ASCET critical and emerging technology (CET) scan, joining the center's earlier work on AI, quantum, and biotechnology.

About ASCET
ASCET is a cooperative agreement between the National Institute of Standards and Technology (NIST) and ASTM International that supports private sector-driven engagement in international standards development. ANSI is an implementing partner of ASCET, along with ASME, the Association for Advancing Automation (A3) Robotics, CSA Group, IEEE, and UL Standards & Engagement (ULSE).